When I first started working with FPGAs, I was surprised to find that while I could simulate my design almost anywhere, I couldn’t just pick a different tool to synthesize or program my FPGA. Vivado for Xilinx, Quartus for Intel and so on. It felt like being locked into a single ecosystem. The narrative is that one should have exposure to all the populat tool chains but proficiency must be built based on the hardware available at hand.

Stages and tool locking:

1. Synthesis : Turning RTL into something the chip understands
   Synthesis is like translating my code into the FPGA’s native language. Every FPGA family has its own “vocabulary” of LUTs, block RAMs, and DSP slices. Using the wrong tool is like trying to speak German with a English dictionary.
2. Implementation (Place & Route) : Finding the perfect spot for everything
   Once the logic is synthesized, the tool decides exactly where each piece goes and how signals travel. Each FPGA’s routing network is unique, so only the vendor tool really knows the fastest, most efficient paths. (Todo: Bypassing auto place and route and seeing how it affects system performance)
3. Timing Analysis : Making sure the design runs at the speed we want
   Even if the logic is correct, a signal might take too long to travel across the chip. Timing analysis relies on the tool knowing the exact delay of every primitive and interconnect. Would be nice if it was not the case but this is a level of detail only the FPGA vendor provides to their own tool chains.
4. Bitstream Generation : The final handshake with the hardware
   Finally, the bitstream programs the FPGA. It’s the ultimate “secret sauce” of the vendor, completely proprietary and tied to the architecture. No generic tool can reliably generate it.

( Todo: Opensource substitute for any of these stages?)

Simulation is the one thing that’s free to roam. It only cares about the logic, not the chip, which is why I can test designs across different tools without trouble.

In the end, while this locking does feel like a limitation, it might just the price of working with such specialized hardware. The tools exist because someone had to understand the FPGA better than anyone else. And honestly, having a tool that “just knows” your FPGA’s quirks might actually be making life a lot easier.